Lisp Computer System: 2014

Multiplexers are important components in an FPGA. While discrete logic and microprocessors would use tri-state buffers for connecting driving components to the same bus, this is not used any more in FPGA's. It is necessary to think about the system and to connect components which need to go to the same destination through a multiplexer. This link shows all the possible ways to define a multiplexer in VHDL.

What is further interesting, however, is how multiplexers are implemented on an FPGA. XAPP522, "Multiplexer Design Techniques for Datapath Performance with Minimized Routing Resources" is a nice document from Xilinx which shows how multiplexers are formed on the FPGA after VHDL synthesis and translation. Basically, it comes down to a function of a lookup table. It is, however, not necessary to design the multiplexer down to this level of detail using a LUT6 component, except in special cases.

Using the standard VHDL statements to implement a multiplexer in VHDL, which are generic, leads to the same results. The generated result will also use a LUT6. However, the standard VHDL code can be used in any FPGA, while the one based upon the LUT6 component can only be used in certain Xilinx FPGA's.

To see the real result of the synthesis using Xilinx design tools, "View Technology Schematic" should be chosen, and not "View RTL Schematic". In the technology schematic it can really be seen how a LUT is used on the FPGA, while the RTL schematic is more symbolic (which put me on the wrong foot when designing an ALU).Using "View RTL Schematic" for a multiplexer does not even give expansion possibilities for the multiplexer block.

The simplest way to define a multiplexer in a design is to implement it using CASE in a process statement, or as a WHEN statement.

  WITH SEL SELECT
    ISUM <=
    STD_LOGIC_VECTOR(UNSIGNED(IA) + UNSIGNED(IB)) WHEN "00",
    STD_LOGIC_VECTOR(UNSIGNED(IA) - UNSIGNED(IB)) WHEN "01",
    STD_LOGIC_VECTOR(SIGNED(IA) + SIGNED(IB))     WHEN "10",
    STD_LOGIC_VECTOR(SIGNED(IA) - SIGNED(IB))     WHEN "11";

Doing it this way, all bus-widths are always automatically accounted for. It is not really necessary to define a multiplexer as a generic component.

Symbol

To have a certain standard in drawing the system, IEEE based symbols are used. This gives consistency over all components. Multiplexers are designated with the following symbols: